Insulated gate type semiconductor devices such as MOSFET (Metal Oxide Semiconductor Filed Effect Transistor) and IGBT (Insulated Gate Bipolar Transistor) are widely used as a power switching element. In the insulated gate type semiconductor device, when a threshold voltage or more is applied to a gate electrode, a channel is formed in a body region, so that an on-state is obtained. Especially, when a trench gate type device is used, a channel width density is improved and a cell pitch can be reduced. Thus the device can be improved in performance such as a reduction in size or being able to be applied to a large current.
Meanwhile, a semiconductor device using silicon carbide (SiC) (hereinafter, referred to as the “silicon carbide semiconductor device”) has drawn attention, and the trench gate type device has been further developed, as a next generation semiconductor device capable of realizing a high withstanding voltage and a low loss.
In the trench gate type semiconductor device, the problem is that when a high voltage is applied while the semiconductor device is in off state, an electric field concentrates on a trench bottom portion. Especially, in a case where SiC is used as semiconductor material, the electric field concentration on the trench bottom portion is likely to become the problem. The reason for this is that since the semiconductor material itself is high in dielectric breakdown strength, breakdown of a gate insulating film is likely to occur due to the electric field concentration on the trench bottom portion before avalanche breakdown occurs inside a drift layer. Therefore, a structure to relax the electric field concentration on the trench bottom portion has been studied.
For example, Japanese Patent Application Laid-Open No. 2001-267570 (Patent Document 1) discloses a trench gate type SiC-MOSFET which uses an n-type inversion layer as a channel. In an n-type layer, below a trench, a p-type electric field shield region is provided to shield an electric field from entering a gate oxide film from the n-type layer at the time of blocking a high voltage. According to the above document, it is supposed that due to this structure, the electric field strength can be relaxed at the gate oxide film portion, especially at the gate oxide film near a lower corner of the trench on which the electric field is likely to concentrate, so that the dielectric breakdown of the gate oxide film does not occur. Thus, it is supposed that a device withstanding voltage as high as insulation characteristics of SiC material can be obtained.